1. Field of the Invention
The present invention relates to an interface circuit, and an electronic device and a communication system each being provided with the interface circuit and more particularly to the interface circuit using a current as a means for transmitting signals, and the electronic device and the communication system each being provided with the above interface circuit.
2. Description of the Related Art
Recently, as operations of a CPU (Central Processing Unit), semiconductor integrated circuit or like forming electronic devices and/or communication devices are sped up and mass processing of signals by the CPU or the like is made available, a demand for transmitting signals with high quality at high speed through a signal transmission path among circuits forming such electronic devices or among electronic devices is increasing.
When a signal is transmitted through the signal transmission path among circuits forming electronic devices or among electronic devices, a voltage whose amplitude changes between a power source and ground is conventionally used for transmitting signals. However, if the signal is transmitted at high speed through the signal transmission path, the signal transmission path cannot be treated as a concentrated constant circuit and has to be treated as a distributed constant circuit in which an inductive component and capacitive component are thought to be uniformly distributed.
Therefore, if voltage is used as the means for transmitting signals through the signal transmission path as in conventional technologies, since the capacitive component (parasitic capacitor) in the signal transmission path is charged and discharged depending on changes in the voltage and time is required for charging and discharging the capacitive component, resulting in a delay in rise time and fall time of signals, there is a limit to high-speed transmission of signals so long as the voltage is used as the means for transmitting signals. Moreover, since mutual interference occurs among the signal transmission paths and quality of the signal is degraded due to influences of external noise, it is impossible to transmit the signal with high quality. Furthermore, if grounding is strengthened to reduce the external noise or if a width of the signal transmission path is extended, number of the signal transmission paths is increased accordingly and routing of the signal transmission path is made difficult. Since the capacitive component of the signal transmission path is charged and discharged depending on changes in the voltage, a high-frequency noise occurs which causes an EMI (Electro-Magnetic Interference) with other electronic devices.
To solve problems of such inconvenience occurring when the voltage is used as the means for transmitting signals, an interface circuit using a current as the means for transmitting signals is proposed. To implement this, a technology called an LVDS (Low Voltage Differential Signaling) is introduced. In the LVDS technology, a constant current source provided in the signal sending section is activated.by two kinds of voltages which are in reverse phase of each other and change with an amplitude being about one-tenth smaller than that of the supply power source in order to feed a differential current through two signal transmission paths and a change in the differential current flowing through a terminating resistor of about 100 ▭ mounted in the signal receiving section is detected as a change of the voltage. An interface circuit having such configurations is disclosed in Japanese Patent Application Laid-open No. Hei7-264042 which is shown in FIG. 11. This interface circuit is chiefly composed of a signal sending section 3 constituting a semiconductor integrated circuit 1 and of a signal receiving section 4 constituting a semiconductor integrated circuit 2. The signal sending section 3 and the signal receiving section 4 are connected through signal transmission paths 5a and 5b formed on a printed circuit board.
The signal sending section 3 is mainly composed of transistors 6a, 6b, 7 and 8, constant current sources 9 and 10 and load resistors 11a and 11b. The transistors 6a and 6b, between which a differential connection is established, constitute a signal sending buffer. A constant current having a predetermined value fed from the constant.current source 9 is applied to these transistors 6a and 6b. To the gate of the transistor 6b is supplied a reference voltage VREF. When a binary input signal DI is applied to the gate of the transistor 6a, each of the transistors 6a and 6b is turned ON alternately depending on the input binary signal DI and then output voltage is generated alternately across the load resistors 11a and 11b having a predetermined resistance. This causes transistors 7 and 8 constituting an analog switch to be turned ON alternately and a constant current having a predetermined value to flow through the signal transmission paths 5a and 5b from the constant current source 10.
The signal receiving section 4 is chiefly composed of amplifiers 12a and 12b, resistors 13a and 13b and a comparator 14. Each of the amplifier 12a and resistor 13a has an impedance matched to that of the signal transmission path 5a. The amplifier 12a and the resistor 13a constitute a trans-impedance circuit adapted to convert the current flowing through the signal transmission path 5ato a voltage. Each of the amplifier 12b and the resistor 13b has an impedance matched to that of the signal transmission path 5b. The amplifier 12b and the resistor 13b also constitute a trans-impedance circuit adapted to convert the current flowing through the signal transmission path 5b to a voltage. When the constant current having the predetermined value flows alternately through the signal transmission paths 5a and 5b, since a voltage having a predetermined value is alternately generated in the amplifier 12a and 12b, the comparator 14 identifies the generated voltage and outputs it as a regenerative signal DP.
In the conventional interface circuit described above, since the constant current source is provided in the signal sending section in any case, if two or more signal receiving sections receive, in parallel, a signal sent from one signal sending section to try to reduce number of the transmission paths, an amplitude of the voltage varies depending on number of signal receiving sections. This is because impedance cannot be matched due to increase and decrease in number of signal receiving sections. Therefore, unless number of the signal receiving sections is determined, the constant current source to be mounted in the signal sending section cannot be designed. Thus, the conventional interface circuit has a shortcoming in that it provides limited versatility and it cannot respond flexibly to changes in state occurring after the installation of the device. In the conventional interface circuit disclosed in the Patent Application described above in particular, since it has the trans-impedance circuit having complicated configurations, changes in designing the signal receiving section are required every time number of the signal receiving sections is changed, which therefore provides further disadvantage. Moreover, in the conventional interface circuit described above, in any case, since a current has to be fed at all times when the signal is transmitted a large reduction of power consumption is not expected.
Moreover, the conventional interface circuit has another shortcoming in that, since the trans-impedance circuit, comparator or a like has complicated configurations, it causes a large-scaled circuit and largely occupied area if the interface circuit is incorporated into the semiconductor integrated circuit or a like.
In view of the above, it is an object of the present invention to provide an interface circuit having a simplified circuit configuration capable of transmitting a signal with high quality at high speed, of decreasing its power consumption and EMI and of reducing number of signal transmission paths, and an electronic device and a communication system each being provided with the above interface circuit.
According to a first aspect of the present invention, there is provided an interface circuit including:
a signal sending circuit having a first switching means and a second switching means which are alternately turned ON in accordance with a binary input signal;
a signal receiving circuit having a first current supplying circuit connected through a first signal transmission path to the first switching means and operated to feed a current with a predetermined value to the first signal transmission path when the first switching means is turned ON and a second current supplying circuit connected through a second signal transmission path to the second switching means and operated to feed a current with a predetermined value to the second signal transmission path when the second switching means is turned ON; and
whereby the signal receiving circuit detects a change in voltages generated depending on availability of current supply at the first and second current supplying circuits and outputs it in the form of a binary output signal.
In the foregoing, a preferable mode is one wherein the signal receiving circuit has a first potential holding means for holding a potential at a connection point between the first current supplying circuit and the first signal transmission path to a predetermined level when the first switching means is turned OFF and a second potential holding means for holding a potential at a connection point between the second current supplying circuit and the second signal transmission path to a predetermined level when the second switching means is turned OFF.
Also, a preferable mode is one wherein the signal sending circuit has an output stopping means to turn OFF both the first switching means and second switching means.
Also, a preferable mode is one wherein the first and second switching means, first and second current supplying circuits and first potential holding means are composed of transistors.
Also, a preferable mode is one wherein at least the first and second current supplying circuits are composed of bipolar transistors.
Furthermore, a preferable mode is one wherein the first current supplying circuit is composed of first and second transistors a size of each being one half that of the transistor used for current supplying circuit composed of only one transistor and each being equal in size and the second current supplying circuit is composed of third and fourth transistors a size of each being one half that of the transistor used for current supplying circuit composed of only one transistor and each being equal in size and wherein circuit configurations seen from a connection point between the first current supplying circuit and the first signal transmission path and those seen from a connection point between the second current supplying circuit and the second transmission path are symmetric.
According to a second aspect of the present invention, there is provided an electronic device provided with the interface circuit described above.
According to a third aspect of the present invention, there is provided an electronic device provided with a circuit having the signal sending circuit described above and with at least one circuit having the signal receiving circuit described above.
According to a fourth aspect of the present invention, there is provided an electronic device provided with at least one circuit having the signal sending circuit described above and with at least one circuit having the signal receiving circuit described above.
According to a fifth aspect of the present invention, there is provided a communication system provided with an electronic device having the signal sending circuit described above and at least one electronic device having the signal receiving circuit described above.
According to a sixth aspect of the present invention, there is provided a communication system provided with at least one electronic device having the signal sending circuit described above and with at least one electronic device having the signal receiving circuit described above.